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ltc2913 1 2913fb features applications description dual uv/ov voltage monitor the ltc ? 2913 is a dual input voltage monitor intended for multiple voltages in a variety of applications. dual inputs for each voltage allow monitoring two separate undervoltage (uv) conditions and two separate overvoltage (ov) conditions. all monitors share a common undervoltage output and a common overvoltage output. the ltc2913-1 has latching capability for the overvoltage output. the ltc2913- 2 has functionality to disable both the overvoltage and undervoltage outputs. glitch ? ltering ensures reliable reset operation without false or noisy triggering. the ltc2913 provides a precise, versatile, space-con- scious, micropower solution for voltage monitoring. n monitors two voltages simultaneously n adjustable uv and ov trip values n guaranteed threshold accuracy: 1.5% n input glitch rejection n adjustable reset timeout with disable n 44a quiescent current n open-drain ov and uv outputs n guaranteed ov and uv for v cc 1v n available in 10-lead msop and (3mm 3mm) dfn packages n desktop and notebook computers n network servers n core, i/o voltage monitors dual ov/uv supply monitor typical transient duration vs comparator overdrive typical application l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 27.4k 1k 44.2k vh1 ltc2913-1 vl1 vh2 gnd tmr system power supplies vl2 ov uv 2913 ta01a latch 4.53k 22nf timeout = 200ms 1k 4.53k v cc 0.1 f 5v 3.3v comparator overdrive past threshold (%) 0.1 400 typical transient duration ( s) 500 600 700 1 10 100 2913 ta01b 300 200 100 0 v cc = 2.3v v cc = 6v reset occurs above curve
ltc2913 2 2913fb absolute maximum ratings terminal voltages v cc (note 3) ............................................. ?0.3v to 6v ov, uv ................................................... ?0.3v to 16v tmr .......................................... ?0.3v to (v cc + 0.3v) vhn, vln, latch , dis .......................... ?0.3v to 7.5v terminal currents i vcc ..................................................................+10ma i uv , i ov ...............................................................10ma (notes 1, 2) 1 2 3 4 5 vh1 vl1 vh2 vl2 gnd 10 9 8 7 6 v cc tmr latch uv ov top view ms package 10-lead plastic msop t jmax = 150c, e ja = 120c/w top view 11 dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 v cc tmr latch uv ov vh1 vl1 vh2 vl2 gnd t jmax = 150c, e ja = 43c/w exposed pad (pin 11) pcb gnd connection optional order part number ms part marking* order part number dd part marking* ltc2913cms-1 ltc2913ims-1 ltc2913hms-1 ltckk ltckk ltckk ltc2913cdd-1 ltc2913idd-1 ltc2913hdd-1 lckn lckn lckn 1 2 3 4 5 vh1 vl1 vh2 vl2 gnd 10 9 8 7 6 v cc tmr dis uv ov top view ms package 10-lead plastic msop t jmax = 150c, e ja = 120c/w top view 11 dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 v cc tmr dis uv ov vh1 vl1 vh2 vl2 gnd t jmax = 150c, e ja = 43c/w exposed pad (pin 11) pcb gnd connection optional order part number ms part marking* order part number dd part marking* ltc2913cms-2 ltc2913ims-2 ltc2913hms-2 ltckm ltckm ltckm ltc2913cdd-2 ltc2913idd-2 ltc2913hdd-2 lckp lckp lckp order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ *the temperature grade is identi? ed by a label on the shipping container. operating temperature range ltc2913c ................................................ 0c to 70c ltc2913i.............................................. ?40c to 85c ltc2913h .......................................... ?40c to 125c storage temperature range ................... ?65c to 150c lead temperature (soldering, 10 sec) msop ............................................................... 300c package/order information
ltc2913 3 2913fb electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. symbol parameter conditions min typ max units v shunt v cc shunt regulator voltage i cc = 5ma l 6.2 6.6 6.9 v C40oc < t a < 125oc l 6.2 6.6 7.0 v v shunt v cc shunt regulator load regulation i cc = 2ma to 10ma l 200 300 mv v cc supply voltage (note 3) l 2.3 v shunt v v ccr(min) minimum v cc output valid dis = 0v l 1v v cc(uvlo) supply undervoltage lockout dis = 0v, v cc rising l 1.9 2 2.1 v v cc(uvhyst) supply undervoltage lockout hysteresis dis = 0v l 52550 mv i cc supply current v cc = 2.3v to 6v l 44 80 a v uot undervoltage/overvoltage threshold l 492 500 508 mv t uod undervoltage/overvoltage threshold to output delay vhn = v uot C 5mv or vln = v uot + 5mv l 50 125 500 s i vhl vhn, vln input current l 15 na C40oc < t a < 125oc l 30 na t uoto uv / ov time-out period c tmr = 1nf l 6 8.5 12.5 ms C40oc < t a < 125oc l 6 8.5 14 ms v latch (vih) ov latch clear input high l 1.2 v v latch (vil) ov latch clear input low l 0.8 v i latch latch input current v latch > 0.5v l 1 a v dis(vih) dis input high l 1.2 v v dis(vil) dis input low l 0.8 v i dis dis input current v dis > 0.5v l 123 a i tmr(up) tmr pull-up current v tmr = 0v l C1.3 C2.1 C2.8 a C40oc < t a < 125oc l C1.2 C2.1 C2.8 a i tmr(down) tmr pull-down current v tmr = 1.6v l 1.3 2.1 2.8 a C40oc < t a < 125oc l 1.2 2.1 2.8 a v tmr(dis) timer disable voltage referenced to v cc l C180 C270 mv v oh output voltage high uv / ov v cc = 2.3v, i uv / ov = C1a l 1v v ol output voltage low uv / ov v cc = 2.3v, i uv / ov = 2.5ma v cc = 1v, i uv = 100a l l 0.1 0.01 0.3 0.15 v v the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 3.3v, vln = 0.45v, vhn = 0.55v, latch = v cc , dis = open unless otherwise noted. (note 2) note 3: v cc maximum pin voltage is limited by input current. since the v cc pin has an internal 6.5v shunt regulator, a low impedance supply that exceeds 6v may exceed the rated terminal current. operation from higher voltage supplies requires a series dropping resistor. see applications information.
ltc2913 4 2913fb speci? cations are at t a = 25c, v cc = 3.3v unless otherwise noted. supply current vs temperature v cc shunt voltage vs temperature v cc shunt voltage vs i cc typical transient duration vs comparator overdrive uv output voltage vs v cc temperature ( c) C50 0.495 trheshold voltage, v uot (v) 0.497 0.499 0.501 C25 0 25 50 2913 g01 75 0.503 0.505 0.496 0.498 0.500 0.502 0.504 100 temperature ( c) C50 25 i cc ( a) 30 40 50 C25 0 25 50 2913 g02 75 55 35 45 100 v cc = 5v v cc = 3.3v v cc = 2.3v temperature ( c) C50 6.2 v cc (v) 6.3 6.4 6.5 6.6 6.8 C25 02550 2913 g03 75 100 6.7 10ma 5ma 2ma 1ma 200 a i cc (ma) C2 0 6.25 v cc (v) 6.45 6.75 2 6 8 2913 g04 6.35 6.65 6.55 4 10 12 C40 c 25 c 85 c comparator overdrive past threshold (%) 0.1 400 typical transient duration ( s) 500 600 700 1 10 100 2913 g05 300 200 100 0 v cc = 2.3v v cc = 6v reset occurs above curve supply voltage, v cc (v) 0 uv voltage (v) 0.4 0.6 0.8 2913 g06 0.2 0 0.2 0.4 0.6 1.0 0.8 v cc uv with 10k pull-up uv without pull-up timing diagrams v hn monitor timing v hn monitor timing (tmr pin strapped to v cc ) v ln monitor timing v ln monitor timing (tmr pin strapped to v cc ) input threshold voltage vs temperature v hn uv v uot 1v t uod t uoto 2913 td01 v ln ov v uot 1v t uod t uoto 2913 td02 v hn uv v uot 1v t uod t uod 2913 td03 v ln ov v uot 1v t uod t uod 2913 td04 typical performance characteristics
ltc2913 5 2913fb uv output voltage vs v cc uv , i sink vs v cc uv / ov voltage output low vs output sink current typical performance characteristics reset timeout period vs temperature reset timeout period vs capacitance dis (pin 8, ltc2913-2): output disable input. disables the ov and uv output pins. when dis is pulled high, the ov and uv pins are not asserted except during a uvlo condition. dis has a weak (2a) internal pull-down to gnd. leave dis open if unused. exposed pad (pin 11, dfn package): exposed pad may be left open or connected to device ground. gnd (pin 5): device ground. latch (pin 8, ltc2913-1): ov latch clear/bypass input. when pin is pulled low, ov is latched when asserted. when pulled high, ov latch is cleared. while held high, ov has the same delay and output characteristics as uv . ov (pin 6): overvoltage logic output. asserts low when either vl input voltage is above threshold. latched low (ltc2913-1). held low for programmed delay time after both vl inputs are valid (ltc2913-2). ov has a weak pull- up to v cc and may be pulled above v cc using an external pull-up. leave ov open if unused. supply voltage, v cc (v) 0 uv voltage (v) 3 4 5 4 2913 g07 2 1 0 1 2 3 5 vhn = 0.55v sel = v cc supply voltage, v cc (v) 0 pull-down current, i uv (ma) 3 4 5 4 2913 g08 2 1 0 1 2 3 5 uv at 150mv uv at 50mv vhn = 0.45v sel = v cc i uv / ov (ma) 0 0 uv / ov , v ol (v) 0.2 0.4 0.6 0.8 1.0 85 c C40 c 25 c 5 10 15 20 2913 g09 25 30 temperature ( c) C50 6 uv / ov timeout period, t uoto (ms) 7 8 9 10 12 C25 02550 2913 g10 75 100 11 c tmr = 1nf tmr pin capacitance, c tmr (nf) 0.1 1 1 uv / ov timeout period, t uoto (ms) 100 10000 10 100 1000 2913 g11 10 1000 speci? cations are at t a = 25c, v cc = 3.3v unless otherwise noted. pin functions
ltc2913 6 2913fb pin functions tmr (pin 9): reset delay timer. attach an external capacitor (c tmr ) of at least 10pf to gnd to set a reset delay time of 9ms/nf. a 1nf capacitor will generate an 8.5ms reset delay time. tie tmr to v cc to bypass timer. uv (pin 7): undervoltage logic output. asserts low when either vh input voltage is below threshold. held low for a programmed delay time after both vh inputs are valid. uv has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. leave uv open if unused. v cc (pin 10): supply voltage. bypass this pin to gnd with a 0.1f (or greater) capacitor. operates as a direct supply input for voltages up to 6v. operates as a shunt regulator for supply voltages greater than 6v and must have a resistance between the pin and the supply to limit input current to no greater than 10ma. when used without a current-limiting resistance, v cc voltage must not exceed 6v. vh1/vh2 (pin 1/pin 3): voltage high inputs 1 and 2. when the voltage on this pin is below 0.5v, an undervoltage condition is triggered. tie pin to v cc if unused. vl1/vl2 (pin 2/pin 4): voltage low inputs 1 and 2. when the voltage on this pin is above 0.5v, an overvoltage condi- tion is triggered. tie pin to gnd if unused. 0.5v + C 4 v l2 3 + C v h2 + C 2 v l1 1 + C v h1 + C uvlo uvlo 2v v cc + C 1v v cc ov pulse generator disable disable ov latch clear/bypass ltc2913-1 tmr v cc 9 ov 6 latch 8 + C 1v 2 a dis 8 gnd 2913 bd 5 10 uv pulse generator oscillator v cc 400k uv 7 400k ltc2913-2 block diagram
ltc2913 7 2913fb applications information voltage monitoring the ltc2913 is a low power dual voltage monitoring circuit with two undervoltage and two overvoltage inputs. a timeout period that holds ov and uv asserted after all faults have cleared is adjustable using an external capacitor and is externally disabled. each voltage monitor has two inputs (vhn and vln) for detecting undervoltage and overvoltage conditions. when con? gured to monitor a positive voltage v n using the 3-resistor circuit con? guration shown in figure 1, vhn is connected to the high side tap of the resistive divider and vln is connected to the low side tap of the resistive divider. 3-step design procedure the following 3-step design procedure determines ap- propriate resistances to obtain the desired uv and ov trip points for the voltage monitor circuit in figure 1. for supply monitoring, v n is the desired nominal operat- ing voltage, i n is the desired nominal current through the resistive divider, v ov is the desired overvoltage trip point and v uv is the desired undervoltage trip point. 1. choose r a to obtain the desired ov trip point r a is chosen to set the desired trip point for the overvoltage monitor. r a = 0.5v i n ? v n v o v (1) 2. choose r b to obtain the desired uv trip point once r a is known, r b is chosen to set the desired trip point for the undervoltage monitor. r b = 0.5v i n ? v n v u v ?r a (2) 3. choose r c to complete the design once, r a and r b are known, r c is determined by: r c = v n i n ?r a ?r b (3) if any of the variables v n , i n , v uv or v ov change, then each step must be recalculated. voltage monitor example a typical voltage monitor application is shown in figure 2. the monitored voltage is a 5v 10% supply. nominal cur- rent in the resistive divider is 10a. 1. find r a to set the ov trip point of the monitor. r a = 0.5v 10 a ? 5v 5.5 v 45.3k 2. find r b to set the uv trip point of the monitor. r b = 0.5v 10 a ? 5v 4.5 v ? 45.3k 10.2k 3. determine r c to complete the design. r c = 5v 10 a ? 45.3k 10.2k 442k figure 1. 3-resistor positive uv/ov monitoring con? guration figure 2. typical supply monitor C + C + + C 0.5v ltc2913 uv n vhn r c r b r a 2913 f01 v n vln ov n vh1 r c 442k r b 10.2k r a 45.3k v cc gnd ltc2913 vl1 2913 f02 ov uv v cc 5v v1 5v 10%
ltc2913 8 2913fb applications information power-up/power-down as soon as v cc reaches 1v during power-up, the uv output asserts low and the ov output weakly pulls to v cc . the ltc2913 is guaranteed to assert uv low and ov high under conditions of low v cc , down to v cc = 1v. above v cc = 2v (2.1v maximum), the vh and vl inputs take control. once both vh inputs and v cc are valid, an internal timer is started. after an adjustable delay time, uv weakly pulls high. threshold accuracy reset threshold accuracy is important in a supply-sensitive system. ideally, such a system resets only if supply voltages fall outside the exact thresholds for a speci? ed margin. all ltc2913 inputs have a relative threshold accuracy of 1.5% over the full operating temperature range. for example, when the ltc2913 is programmed to moni- tor a 5v input with a 10% tolerance, the desired uv trip point is 4.5v. because of the 1.5% relative accuracy of the ltc2913, the uv trip point is between 4.433v and 4.567v which is 4.5v 1.5%. likewise, the accuracy of the resistances chosen for r a , r b and r c can affect the uv and ov trip points as well. using the example just given, if the resistances used to set the uv trip point have 1% accuracy, the uv trip range is between 4.354v and 4.650v. this is illustrated in the following calculations. the uv trip point is given as: v uv = 0.5v 1 + r c r a + r b the two extreme conditions, with a relative accuracy of 1.5% and resistance accuracy of 1%, result in: v uv(min) = 0.5v ? 0.985 ? 1 + r c ? 0.99 r a + r b () ? 1.01 and v uv(max) = 0.5v ? 1.015 ? 1 + r c ? 1.01 r a + r b () ? 0.99 for a desired trip point of 4.5v, r c r a + r b = 8 therefore, v uv(min) = 0.5v ? 0.985 ? 1 + 8 0.99 1.01 = 4.354v and v uv(max) = 0.5v ? 1.015 ? 1 + 8 1.01 0.99 = 4.650v glitch immunity in any supervisory application, noise riding on the moni- tored dc voltage causes spurious resets. to solve this problem without adding hysteresis, which causes a new error term in the trip voltage, the ltc2913 lowpass ? lters the output of the ? rst stage comparator at each input. this ? lter integrates the output of the comparator before as- serting the uv or ov logic. a transient at the input of the comparator of suf? cient magnitude and duration triggers the output logic. the typical performance characteristics show a graph of the transient duration vs. comparator overdrive.
ltc2913 9 2913fb uv/ov timing the ltc2913 has an adjustable timeout period (t uoto ) that holds ov or uv asserted after all faults have cleared. this assures a minimum reset pulse width allowing a settling time delay for the monitored voltage after it has entered the valid region of operation. when any vh input drops below its designed threshold, the uv pin asserts low. when all inputs recover above their designed thresholds, the uv output timer starts. if all inputs remain above their designed thresholds when the timer ? nishes, the uv pin weakly pulls high. however, if any input falls below its designed threshold during this timeout period, the timer resets and restarts when all inputs are above the designed thresholds. the ov output behaves as the uv output when latch is high (ltc2913-1). selecting the uv/ov timing capacitor the uv and ov timeout period (t uoto ) for the ltc2913 is adjustable to accommodate a variety of applications. connecting a capacitor, c tmr , between the tmr pin and ground sets the timeout period. the value of capacitor needed for a particular timeout period is: c tmr = t uoto ? 115 ? 10 C9 [f/s] the reset timeout period vs capacitance graph found in the typical performance characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. the tmr pin must have a minimum 10pf load or be tied to v cc . for long timeout periods, the only limitation is the availability of a large value capacitor with low leakage. capacitor leakage current must not exceed the minimum tmr charging current of 1.3a. tying the tmr pin to v cc will bypass the timeout period. undervoltage lockout when v cc falls below 2v, the ltc2913 asserts an undervoltage lockout (uvlo) condition. during uvlo, uv is asserted and pulled low while ov is cleared and blocked from asserting. when v cc rises above 2v, uv follows the same timing procedure as an undervoltage condition on any input. shunt regulator the ltc2913 has an internal shunt regulator. the v cc pin operates as a direct supply input for voltages up to 6v. under this condition, the quiescent current of the device remains below a maximum of 80a. for v cc voltages higher than 6v, the device operates as a shunt regulator and must have a resistance r z between the supply and the v cc pin to limit the current to no greater than 10ma. when choosing this resistance value, select an appropriate location on the i-v curve shown in the typical performance characteristics to accommodate any variations in v cc due to changes in current through r z . uv and ov output characteristics the dc characteristics of the uv and 0v pull-down strength are shown in the typical performance characteristics. each pin has a weak internal pull-up to v cc and a strong pull- down to ground. this arrangement allows these pins to have open-drain behavior while possessing several other bene? cial characteristics. the weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. on the other hand, the open-drain con? guration allows for wired-or connections, and is useful when more than one signal needs to pull down on the output. v cc of 1v guarantees a maximum v ol = 0.15v at uv . at v cc = 1v, the weak pull-up current on ov is barely turned on. therefore, an external pull-up resistor of no more than 100k is recommended on the ov pin if the state and pull-up strength of the ov pin is crucial at very low v cc . note however, by adding an external pull-up resistor, the pull-up strength on the ov pin is increased. therefore, if it is connected in a wired-or connection, the pull-down strength of any single device must accommodate this additional pull-up strength. output rise and fall time estimation the uv and ov outputs have strong pull-down capabil- ity. the following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (c load ): t fall 2.2 ? r pd ? c load applications information
ltc2913 10 2913fb applications information where r pd is the on-resistance of the internal pull-down transistor, typically 50 at v cc > 1v and at room tem- perature (25c). c load is the external load capacitance on the pin. assuming a 150pf load capacitance, the fall time is 16.5ns. the rise time on the uv and ov pins is limited by a 400k pull-up resistance to v cc . a similar formula estimates the output rise time (10% to 90%) at the uv and ov pins: t rise 2.2 ? r pu ? c load where r pu is the pull-up resistance. ov latch (ltc2913-1) with the latch pin held low, the ov pin latches low when an ov condition is detected. the latch is cleared by raising the latch pin high. if an ov condition clears while latch is held high, the latch is bypassed and the ov pin behaves the same as the uv pin with a similar timeout period at the output. if latch is pulled low while the timeout period is active, the ov pin latches as before. disable (ltc2913-2) the ltc2913-2 allows disabling the uv and ov outputs via the dis pin. pulling dis high will force both outputs to remain weakly pulled high, regardless of any faults that occur on the inputs. however, if a uvlo condition occurs, uv asserts and pulls low, but the timeout function is bypassed. uv pulls high as soon as the uvlo condition is cleared. dis has a weak 2a (typical) internal pull-down current guaranteeing normal operation with the pin left open. dual uv/ov supply monitor, 10% tolerance, 5v, 3.3v supply monitor powered from 12v, 10% tolerance, 12v, 5v r c2 27.4k r b1 1k r c1 44.2k 10 6 7 8 9 5 4 3 2 1 vh1 vl1 vh2 gnd tmr system power supplies vl2 ov uv 2913 ta02 latch r a2 4.53k c tmr 22nf timeout = 200ms r b2 1k r a1 4.53k v cc ltc2913-1 c byp 0.1 f 5v 3.3v r c2 44.2k r b1 1k r c1 115k r z 10k 10 6 7 8 9 5 4 3 2 1 vh1 vl1 vh2 gnd tmr system power supplies vl2 ov uv 2913 ta03 dis r a2 4.53k r b2 1k r a1 4.53k v cc ltc2913-2 c byp 0.1 f 12v 5v typical applications
ltc2913 11 2913fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd10) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.50 0.05 package outline 0.25 0.05 0.50 bsc msop (ms) 0603 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ? 0.27 (.007 ? .011) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc
ltc2913 12 2913fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 1007 ? rev b ? printed in usa typical application dual uv/ov supply monitor with led undervoltage and overvoltage indicator and manual undervoltage reset button, 10% tolerance, 12v, 5v part number description comments ltc1326/ ltc1326-2.5 micropower precision triple supply monitor for 5v/2.5v, 3.3v and adj 4.725v, 3.118v, 1v threshold (0.75%) ltc1726-2.5/ ltc1726-5 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727-2.5/ ltc1727-5 micropower triple supply monitor with open-drain reset individual monitor outputs in msop ltc1728-1.8/ ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1728-2.5/ ltc1728-5 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1985-1.8 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop and 3mm 3mm 10-lead dfn package ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor adjustable reset and tolerance, 16-lead ssop package, margining functions ltc2903 precision quad supply monitor 6-lead sot-23 package, ultralow voltage reset ltc2904 3-state programmable precision dual supply monitor adjustable tolerance, 8-lead sot-23 package ltc2905 3-state programmable precision dual supply monitor adjustable reset and tolerance, 8-lead sot-23 package ltc2906 precision dual supply monitor 1-selectable and 1 adjustable separate v cc pin, rst/ rst outputs ltc2907 precision dual supply monitor 1-selectable and 1 adjustable separate v cc , adjustable reset timer ltc2908 precision six supply monitor (four fixed & 2 adjustable) 8-lead sot-23 and dfn packages ltc2909 prevision dual input uv, ov and negative voltage monitor separate v cc pin, adjustable reset timer, 8-lead tsot-23 and dfn packages ltc2910 octal positive/negative voltage monitor separate v cc pin, eight inputs, up to two negative monitors adjustable reset timer, 16-lead ssop and dfn packages ltc2914 quad uv/ov positive/negative voltage monitor separate v cc pin, four inputs, up to two negative monitors, adjustable reset timer, 16-lead ssop and dfn packages 2.05m 10k 100k 510 led 1k 44.2k vh1 vl1 vh2 gnd tmr system power supplies vl2 ov uv 2913 ta05 dis 22nf timeout = 200ms 4.53k manual reset button (normally open) v cc ltc2913-2 0.1 f 12v 5v 510 led related parts

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